MI-16 ISA    25-8-2019  roelh

My Ideal 16 bit ISA.

load-store RISC architecture

16 registers, 16 bit each. R15 is the program counter.

Registers 0-7 are mostly for data ( D0-D7)
Registers 8-15 are mostly for addresses ( A0-A7 )

16 bit instructions.

Three instruction formats:

1) Immediate 8 bit:
    bit 15: always 1
    bit 14-12: 3 bit opcode

    bit 11-8: 4 bit destination register
    bit 7-0: 8 bit immediate data

    There is room for 8 instructions, the immediate byte is sign-extended.
    Possible instructions (except for pc): load, add, and, or, xor, cmp  ( 3 free )

    When the destination is the PC, the 8 instructions are relative jumps with 
    several conditions. A relative call can also be one of these.

2) Word memory access with 5 bit offset
    bit15: always 0
    bit14 and 13: both 1
    bit 12: 0 for load, 1 for store
    bit 11-8: 4 bit destination register

    bit7-5: 3 bit address register (A0-A7)
    bit 4-0: 5 bit offset


3) Register-to-register 3-operand instructions
    bit15: always 0
    bit14-12: 3 bit opcode, ( 6 combinations available, because 11x used for format 2)
    bit 11-8: 4 bit destination register

    bit7-5: 3 bit data src2 register (D0-D7)
    bit 4: 1 bit opcode extension
    bit 3-0: 4 bit src1 register (R0 - R15)

    Operand src2 is restricted to 8 registers, to increase the number of instructions from 6 to 12.

    Instructions: add, sub, and, or, xor
        ld/st with address (src1+src2)
        2 codes used for 2-operand instructions (src2 used to select 16 operations)
        (only 9 3-op instructions used, so 3 codes free)

    2-operand instructions:
        neg, cpl, <several shifts>
        ld/st with post-increment or pre-decrement
        ld/st with 16 bit offset

Note that for the 3-operand instructions, a compare is not needed. Just use a subtract
instruction and put the result in an unused register.

Note that the auto-increment instruction can be used with R15 to provide 16 bit
immediates that follow the instruction. When the destination is PC, this is an
immediate jump. Just like in the PDP-11.
If every loading of the PC also saves the old value of the PC, a jump can also be used as
a call.
Since the PC is a normal register, it can also be loaded from any address, providing a
return instruction or indirect call.

Not yet provided: byte load/store